"Key progress," says CXMT, racing Samsung and SK Hynix on the same cell

China's largest memory chipmaker ^[5] says it has advanced a denser memory-cell design and plans a server product by the end of 2026, setting an aggressive deadline against its Korean rivals. ^[1]

ChangXin Memory Technologies, known as CXMT, announced the advance at an industry event in Shanghai over the weekend of October 10-11. The company is pursuing a layout called 4F square, which packs more memory cells into the same chip area than the mainstream design used today. ^[1][2]

That could make each chip hold more data and reduce the cost of memory capacity, an important part of the economics of AI hardware. It also puts CXMT into a race with Samsung Electronics and SK Hynix over a major change in how memory chips are built. ^[2]

CXMT president Cao Kanyu said the company had made "key progress", according to a company statement. CXMT plans to introduce a server-memory product using the structure before the year ends. ^[1]

The technological claim has not been independently verified. CXMT has not specified whether it has produced a working die, meaning a single finished memory chip cut from a silicon wafer, what manufacturing process it would use, or whether its approach includes the transistor and material changes its rivals are pursuing. Neither Samsung nor SK Hynix has commented so far. ^[1][2]

More memory in the same space

DRAM is the working memory that computers use to keep data close to their processors. Each cell stores a tiny electrical charge, which must remain strong enough to be read reliably. Making the cell smaller therefore involves more than drawing a smaller rectangle.

The mainstream layout gives each cell an area of 6F². The letter F represents the minimum line width of the semiconductor process. In the proposed 4F² structure, the cell fits inside a square measuring 2F on each side. ^[1][2]

The footprint falls by one-third. Turn the arithmetic around and the same area could theoretically accommodate 50 percent more cells. The expected density improvement is roughly 30 to 50 percent, according to the industry reporting, allowing more storage capacity on a chip of the same size. ^[2]

That is a substantial gain without needing a larger chip. If manufacturers can produce the denser design reliably and at a competitive cost, more capacity per chip gives them room to lower the cost per unit of memory. It does not guarantee a matching fall in the price customers pay.

The approach Samsung and SK Hynix are pursuing uses a vertical channel transistor, or VCT, with the charge-storing capacitor stacked directly above the transistor. This arrangement makes tighter packing possible. ^[2]

It also requires a change in the material through which current flows, from silicon to indium gallium zinc oxide, known as IGZO. That material helps reduce the leakage of charge and retain data. The smaller footprint comes with a manufacturing overhaul. ^[2]

CXMT's announcement places it in this contest, but does not establish that it has solved those manufacturing problems. The year-end product promise is the part customers can eventually test.

A deadline ahead of Samsung's

Samsung reportedly produced a working DRAM die using the 4F square structure and VCT in March 2026. Its target for mass production is 2028, according to TrendForce, citing Korean industry publications The Elec and The Bell. ^[2]

SK Hynix is reportedly planning to introduce the technologies at its 10b manufacturing generation rather than the earlier 10a generation. Those labels identify successive chipmaking processes, rather than memory capacities. ^[2]

A working die, a product launch and mass production are different milestones. CXMT's promised server product by the end of 2026 should therefore not be read as a promise to reach Samsung's planned production scale two years earlier. Even so, putting a usable product into customers' hands this year would be a significant step. ^[1][2]

CXMT is already large enough to matter to the market. It held 10 percent of global DRAM sales in the second quarter of 2026, making it the fourth-largest supplier.

Samsung held 38 percent, SK Hynix 25 percent and Micron 24 percent. Together, those three accounted for 87 percent. ^[4]

The Chinese company's finances have expanded sharply. First-half revenue rose 874 percent from a year earlier to 150.3 billion yuan. Net profit attributable to shareholders reached 77.6 billion yuan, compared with a 2.3-billion-yuan loss a year earlier. ^[4]

Its July flotation on Shanghai's STAR Market raised at least $8.6 billion. The company, founded in Hefei in 2016, saw its shares rise 466 percent on their first trading day. Investor enthusiasm is no substitute for a working memory chip, but the fundraising gives the development effort financial weight. ^[5]

There is already reported commercial interest in CXMT's existing memory. Apple, Dell and HP have reportedly qualified its DRAM for products sold in China, according to reports and analyst notes. That concerns existing products, rather than the newly announced design. ^[3][6][8]

Export controls meet a product promise

US restrictions limit CXMT's access to advanced chipmaking tools. The company was added to the Commerce Department's Entity List in 2025, imposing licensing requirements on exports of US-controlled tools and technology. The Pentagon has also designated it a "Chinese military company". ^[5][6][7]

Those restrictions make manufacturing progress harder. They do not establish how much slower CXMT would advance than it would without them. A successful 4F square launch would challenge the assumption that restricted access keeps Chinese memory makers behind the next generation of design, while leaving unanswered how it would have progressed without the restrictions.